Multi-Processor System-on-Chip 1. Liliana AndradeЧитать онлайн книгу.
the total number of cycles on a single RISC-V core is 1.5x8.2 = 12.3 Mcycles.
Table 1.4. Performance data for the CIFAR-10 CNN graph
# | Layer type | ARC EM9D [ Mcycles ] | Processor A [ Mcycles ] | Processor B (RISC-V ISA) [ Mcycles ] |
0 | Permute | 0.01 | – | – |
1 | Convolution | 1.63 | 6.78 | – |
2 | Max Pooling | 0.14 | 0.34 | – |
3 | Convolution | 3.46 | 9.25 | – |
4 | Avg Pooling | 0.09 | 0.09 | – |
5 | Convolution | 1.76 | 4.88 | – |
6 | Avg Pooling | 0.07 | 0.04 | – |
7 | Fully-connected | 0.03 | 0.02 | – |
8 | Fully-connected | 0.001 | – | |
Total | 7.2 | 21.4 | 12.3 |
From Table 1.4, we conclude that the ARC EM9D processor spends 3x fewer cycles than processor A and 1.7x fewer cycles than the RISC-V core (processor B) for the same machine learning inference task, without using any specific accelerators. Thanks to the good cycle efficiency, the ARC EM9D processor can be clocked at a low frequency, which helps to save power in a smart IoT edge device.
1.4. Conclusion
Smart IoT edge devices that interact intelligently with their users are appearing in many application areas. These devices have diverse compute requirements, including a mixture of control processing, DSP and machine learning. Versatile processors are required to efficiently execute these different types of workloads. Furthermore, these processors must allow for easy customization to improve their efficiency for a specific application. Configurability and extensibility are two key mechanisms that provide such customization. Increasingly, IoT edge devices apply machine learning technology for processing captured sensor data, so that smart actions can be taken based on recognized patterns. We presented key processor features and a software library for the efficient implementation of low/mid-end machine learning inference. More specifically, we highlighted several processor capabilities, such as vector MAC instructions and XY memory with advanced AGUs, that are key to the efficient implementation of machine learning inference. The ARC EM9D processor is a universal processor for low-power IoT applications which is both configurable and extensible. The complete and highly optimized embARC MLI library makes effective use of the ARC EM9D processor to efficiently support a wide range of low/mid-end machine learning applications. We demonstrated this efficiency with excellent results for the CIFAR-10 benchmark.
1.5. References
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